The construction of electronic devices involves the combination of a variety of materials exhibiting various mechanical and electrical properties. A designer or manufacturer of such devices may choose materials based in part on the mechanical and electrical properties of the materials in order to achieve performance and/or reliability in the devices.
Some materials used in electronic devices can be modified by adding fillers thereto. Fillers can be chosen to modify the Theological, thermal, and/or mechanical properties of the materials to which they are added. However, the use of fillers to advantageously modify one property can also introduce undesired modifications to one or more other properties in those materials. Thus, a manufacturer of electronic devices may be forced to choose a proportion of filler which is more or less than ideal with regard to one property in order to mitigate an adverse impact on other properties.
Electronic devices are frequently assembled from a semiconductor die and a next level package. The next level package may be, for example, a substrate, an interposer, a printed circuit board, or a printed wiring board. Substrates may comprise a core upon which is built one or more layers of wiring and build up dielectric. Substrates are typically formed with alternating layers of conductive material and build up dielectric material. Wiring patterns, commonly known as traces, may be built in the conductive material through various etching processes such as wet etching which are known in the art and will not be described further herein. A semiconductor die may be joined with the next level package by soldered interconnects and have an underfill agent disposed between them.
Electronic devices so constructed suffer from a number of stresses resulting from differing coefficients of thermal expansion in the various materials employed. For example, the substrate core may have a different coefficient of thermal expansion than the build up dielectric layers. Similarly, the underfill agent may have a different coefficient of thermal expansion than the next level package, the soldered interconnects, or the semiconductor die. The resulting stresses can lead to defects such as via delamination and corner fillet cracking in the underfill material, mechanical failures to the interconnects, and cracks in the interlayer dielectric of the semiconductor die.
As previously mentioned, the coefficients of thermal expansion for some of the materials used in the construction of electronic devices can be modified by the addition of fillers. For example, the material used for the substrate build up dielectric layer may be modified with a silica filler to reduce the coefficient of thermal expansion of the layer. Similarly, the underfill agent used in joining the semiconductor die with the next level package may be modified with a silica filler to reduce its coefficient of thermal expansion. However, known fillers may be inadequate to sufficiently modify these materials because heavily modified materials may exhibit poor flow characteristics and other undesirable properties. Thus, designers of electronic devices may be faced with using materials which have coefficients of thermal expansion greater than desired in order to retain in those materials other important qualities such as viscosity or filler loading. Hence, there is a significant need in the art for improved materials,